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What is the exact source of Architecture info in lscpu command

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# Tl;dr I need to mock info about CPU architecture on the server for testing purpose. The only way that I can achieve it, is by changing info source about CPU architecture, that is used by lscpu command (**lscpu | grep Architecture HAS to return mocked architecture**). I know that lscpu gets data from /proc/cpuinfo and sysf, but I cannot find **what exactly** I need to change, for lscpu to return different architecture? # Context I'm performing simple checks for CPU architecture used by user. I'm doing it by check like if 'arm' =~ (lscpu | grep Architecture | awk '{print $2}'). It's trivial check, that I want to cover. However, the issue is, that I don't know how to perform different checks for different types of architecture. What I've tried to do: 1. Pre-preparing lscpu file with mocked echo Architecture: and adding it to $PATH - tested app uses different $PATH, so it is not effective. 2. Pre-preparing lscpu file with mocked lscpu | sed -r and binding it over orginal lscpu by sudo mount --bind /usr/bin/lscpu - in this case, every lscpu call hangs the machine. 3. Using different command than lscpu - tested app uses lscpu explicitly. That's how I've assumed that the only way is to mock the data in /proc/cpuinfo (example output below: there's no "CPU Architecture" field):
processor	: 31
vendor_id	: AuthenticAMD
cpu family	: 25
model		: 33
model name	: AMD Ryzen 9 5950X 16-Core Processor
stepping	: 0
microcode	: 0xa201025
cpu MHz		: 4065.719
cache size	: 512 KB
physical id	: 0
siblings	: 32
core id		: 15
cpu cores	: 16
apicid		: 31
initial apicid	: 31
fpu		: yes
fpu_exception	: yes
cpuid level	: 16
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm
bugs		: sysret_ss_attrs spectre_v1 spectre_v2 spec_store_bypass
bogomips	: 6787.39
TLB size	: 2560 4K pages
clflush size	: 64
cache_alignment	: 64
address sizes	: 48 bits physical, 48 bits virtual
power management: ts ttp tm hwpstate cpb eff_freq_ro
or sysfs, for lscpu to be ran normally and output the mocked data. However I cannot find the specific place for this CPU architecture data to change - is it possible? If yes, what is the exact place where this data is stored, and how to mock it? Every idea would be appreciated!
Asked by mindgod (21 rep)
Mar 28, 2023, 05:56 PM
Last activity: Mar 28, 2023, 05:57 PM