Performance and Data Loss Issues with MSI on AXI UART16550

I am experiencing significant performance and data loss issue with the AXI UART16550 on our Xilinx FPGA. Initially, the device operated without any problems using legacy interrupts. However, after switching to Message Signaled Interrupts (MSI), I began to encounter severe performance degradation. Specifically, the CPU usage spikes to 100% when using the UART device, and we are losing data during high-speed transmissions. The FPGA is configured to use MSI, and the MSI is correctly assigned in the PCI configuration space. We are using a custom serial8250-based driver in Linux, and the FIFO settings have been adjusted to minimize RX buffer overflow. Despite these optimizations, the problem persists. Testing with legacy interrupts shows that the device operates correctly without data loss or high CPU usage. Could you please provide guidance on the recommended settings for MSI when using AXI UART16550? Are there any known limitations or specific configurations required for reliable MSI operation in this context? Additionally, should any modifications be made at the FPGA configuration level, such as PCIe IP core settings, to improve MSI performance? If you require further information, including code snippets, register configurations, or test results, please let me know. I would greatly appreciate your assistance in resolving this issue. Thank you for your support. Best regards. FPGA: xc7k160tfbg676-2L Vivado versiyon: 2018.3 PCIe IP: AXI Memory Mapped to PCI Express (2.9) UART: AXI UART16550 (2.0) Driver: Serial8250